Scope

• Sub-10 nm transistors employing conventional and novel architectures including non-classical structures, novel channel and source/drain materials, non-thermal injection mechanisms
• Device physics of nanodevices including quantum effects, nonequilibrium and ballistic transport
• Modeling and simulation of nanoscale devices
• Extreme processing of nanostructures, including nanopatterning
• Junction and insulator materials and process technology for nanodevices
• Nanoscale surface, interface, and heterojunction effects in nanodevices
• Device scaling issues including doping fluctuations and atomic granularity
• Novel devises and architectures for non-classical computing, including quantum and neuromorphic computing
• Circuit design issues and novel circuit architectures for nanodevices
• Novel non-volatile memories, including MRAM, ReRAM, PCM, FeRAM, etc.
• Optoelectronics using silicon-based nanostructures
• Devices for heterogeneous integration on silicon, including 2D materials, Ge and III-V, CNT, spin-based devices, MEMS and NEMS, etc.
• Environmental devices which contribute to low-carbon society (wireless sensors, energy harvestors, steep slope devices, etc.)

Paper Preparation Guide